Multi-frame capture (trigger-controlled DPW) validated in testbench; added 128-bit packer replacing serializer, correct unpacking (SI reinterpret) and frame reconstruction verified (counter + PFB); implemented VALID gating (zero when idle) and AXI-aligned pipelining; nFrames parameterized in TB
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@@ -46,7 +46,7 @@ pulseGenGain = 1;
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%% Software parameters
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% Signal generator update rate
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TsSW = 0.25;
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TsSW = 0.00025;
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%% Simulation parameters
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