AXI with 128 bits and no serializer appears to be working
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@@ -51,7 +51,7 @@ TsSW = 0.5e-3;
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%% Simulation parameters
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% Sim run time
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stoptime = TsFPGA*(9+348+3+38+2*128); %10*TsSW; %TsFPGA*(1*128+348)
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stoptime = TsFPGA*(9+348+3+38+4*128); %10*TsSW; %TsFPGA*(1*128+348)
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%% Channelizer parameters
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