AXI with 128 bits and no serializer appears to be working

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canisio
2026-04-14 16:46:18 -03:00
parent 3748b65872
commit aad231b55a
2 changed files with 1 additions and 1 deletions

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@@ -51,7 +51,7 @@ TsSW = 0.5e-3;
%% Simulation parameters
% Sim run time
stoptime = TsFPGA*(9+348+3+38+2*128); %10*TsSW; %TsFPGA*(1*128+348)
stoptime = TsFPGA*(9+348+3+38+4*128); %10*TsSW; %TsFPGA*(1*128+348)
%% Channelizer parameters