Initial
This commit is contained in:
33
.gitattributes
vendored
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33
.gitattributes
vendored
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* text=auto
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*.fig binary
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*.mat binary
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*.mdl binary diff merge=mlAutoMerge
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*.mdlp binary
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*.mex* binary
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*.mlapp binary
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*.mldatx binary merge=mlAutoMerge
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*.mlproj binary
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*.mlx binary
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*.p binary
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*.plprj binary
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*.sbproj binary
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*.sfx binary
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*.sldd binary
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*.slreqx binary merge=mlAutoMerge
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*.slmx binary merge=mlAutoMerge
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*.sltx binary
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*.slxc binary
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*.slx binary merge=mlAutoMerge
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*.slxp binary
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## MATLAB Project metadata files use LF line endings
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/resources/project/**/*.xml text eol=lf
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## Other common binary file types
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*.docx binary
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*.exe binary
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*.jpg binary
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*.pdf binary
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*.png binary
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*.xlsx binary
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40
.gitignore
vendored
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40
.gitignore
vendored
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# Autosave files
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*.asv
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*.m~
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*.autosave
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*.slx.r*
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*.mdl.r*
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# Derived content-obscured files
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*.p
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# Compiled MEX files
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*.mex*
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# Packaged app and toolbox files
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*.mlappinstall
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*.mltbx
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# Deployable archives
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*.ctf
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# Generated helpsearch folders
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helpsearch*/
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# Code generation folders
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slprj/
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sccprj/
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codegen/
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# Cache files
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*.slxc
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# Cloud based storage dotfile
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.MATLABDriveTag
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# buildtool cache folder
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.buildtool/
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# SimBiology backup files
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*.sbproj.backup
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*.sbproj.bak
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2
BeamForming.prj
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2
BeamForming.prj
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<?xml version="1.0" encoding="UTF-8"?>
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<MATLABProject xmlns="http://www.mathworks.com/MATLABProjectFile"/>
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BIN
referencedmodels/soc_rfsoc_fpga.slx
Normal file
BIN
referencedmodels/soc_rfsoc_fpga.slx
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Binary file not shown.
BIN
referencedmodels/soc_rfsoc_proc.slx
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BIN
referencedmodels/soc_rfsoc_proc.slx
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Binary file not shown.
@@ -0,0 +1,6 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info>
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<Category UUID="FileClassCategory">
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<Label UUID="design"/>
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</Category>
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</Info>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="soc_rfsoc_shutdown.m" type="File"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="1" type="DIR_SIGNIFIER"/>
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@@ -0,0 +1,6 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info>
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<Category UUID="FileClassCategory">
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<Label UUID="design"/>
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</Category>
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</Info>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="soc_rfsoc_init.m" type="File"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info Ref="" Type="Relative"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="7ac7702b-30c0-47d0-8a3a-1562b67f2ab5" type="Reference"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info Ref="referencedmodels" Type="Relative"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="15258b0d-3597-4917-9d8b-5ec7677aa528" type="Reference"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info Ref="utilities" Type="Relative"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="082474f0-d7d9-423c-bb63-dc039b2ad79a" type="Reference"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info File="utilities/soc_rfsoc_shutdown.m" Icon="" Name="soc_rfsoc_shutdown" Type="Shutdown" Visible="0"/>
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="7d63d4a9-9d55-41fa-b005-0a62ca4e1c4b" type="EntryPoint"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info File="soc_rfsoc_top.slx" Icon="" Name="Open Top model" Type="Basic" Visible="1"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="992f77a5-d756-4925-af3d-4c4ad157be49" type="EntryPoint"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info File="referencedmodels/soc_rfsoc_fpga.slx" Icon="" Name="Open FPGA model" Type="Basic" Visible="1"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="1117b866-13fd-4876-9d3c-fe93be7b2986" type="EntryPoint"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info File="referencedmodels/soc_rfsoc_proc.slx" GroupUUID="" Icon="" Name="Open Processor model" Type="Basic" Visible="1"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="c23e4a41-cd67-47c3-b50c-bb83f6e237de" type="EntryPoint"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info Name="Test" ReadOnly="INHERITED"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="test" type="Label"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info Name="Other" ReadOnly="INHERITED"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="other" type="Label"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info Name="Convenience" ReadOnly="INHERITED"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="convenience" type="Label"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info Name="None" ReadOnly="INHERITED"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="none" type="Label"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info Name="Derived" ReadOnly="INHERITED"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="derived" type="Label"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info Name="Design" ReadOnly="INHERITED"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="design" type="Label"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info Name="Artifact" ReadOnly="INHERITED"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="artifact" type="Label"/>
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@@ -0,0 +1,6 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info>
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<Category UUID="FileClassCategory">
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<Label UUID="design"/>
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</Category>
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</Info>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="soc_rfsoc_fpga.slx" type="File"/>
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<?xml version='1.0' encoding='UTF-8'?>
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<Info/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="1" type="DIR_SIGNIFIER"/>
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@@ -0,0 +1,6 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info>
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<Category UUID="FileClassCategory">
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<Label UUID="design"/>
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</Category>
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</Info>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="soc_rfsoc_proc.slx" type="File"/>
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2
resources/project/Project.xml
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2
resources/project/Project.xml
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info MetadataType="fixedPathV2"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info DataType="None" Name="Classification" ReadOnly="1" SingleValued="1"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="FileClassCategory" type="Category"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="utilities" type="File"/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="referencedmodels" type="File"/>
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@@ -0,0 +1,6 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info>
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<Category UUID="FileClassCategory">
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<Label UUID="design"/>
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</Category>
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</Info>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="soc_rfsoc_top.slx" type="File"/>
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2
resources/project/root/6x1BhZX_fLnKpcwqra0qFwv1jIgp.xml
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2
resources/project/root/6x1BhZX_fLnKpcwqra0qFwv1jIgp.xml
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="Root" type="Extensions"/>
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2
resources/project/root/EEtUlUb-dLAdf0KpMVivaUlztwAp.xml
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2
resources/project/root/EEtUlUb-dLAdf0KpMVivaUlztwAp.xml
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="Root" type="ProjectPath"/>
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2
resources/project/root/GiiBklLgTxteCEmomM8RCvWT0nQd.xml
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2
resources/project/root/GiiBklLgTxteCEmomM8RCvWT0nQd.xml
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<?xml version='1.0' encoding='UTF-8'?>
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<Info Name="BeamForming"/>
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2
resources/project/root/GiiBklLgTxteCEmomM8RCvWT0nQp.xml
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2
resources/project/root/GiiBklLgTxteCEmomM8RCvWT0nQp.xml
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="ProjectData" type="Info"/>
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2
resources/project/root/KAXfQgCar2Yb8zOxgvf9hdmLP1Ep.xml
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2
resources/project/root/KAXfQgCar2Yb8zOxgvf9hdmLP1Ep.xml
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="Root" type="EntryPoints"/>
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2
resources/project/root/NmGqIpAwUJcXFyLjFAGnU9uyN5Yp.xml
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2
resources/project/root/NmGqIpAwUJcXFyLjFAGnU9uyN5Yp.xml
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="Root" type="ProjectData"/>
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25
resources/project/root/fjRQtWiSIy7hIlj-Kmk87M7s21kd.xml
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25
resources/project/root/fjRQtWiSIy7hIlj-Kmk87M7s21kd.xml
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<?xml version='1.0' encoding='UTF-8'?>
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<Category Location="FileClassCategory">
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<Info DataType="None" Name="Classification" ReadOnly="1" SingleValued="1"/>
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<Label Location="artifact">
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<Info Name="Artifact" ReadOnly="READ_ONLY"/>
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</Label>
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<Label Location="convenience">
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<Info Name="Convenience" ReadOnly="READ_ONLY"/>
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</Label>
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<Label Location="derived">
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<Info Name="Derived" ReadOnly="READ_ONLY"/>
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</Label>
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<Label Location="design">
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<Info Name="Design" ReadOnly="READ_ONLY"/>
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</Label>
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<Label Location="none">
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<Info Name="None" ReadOnly="READ_ONLY"/>
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</Label>
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<Label Location="other">
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<Info Name="Other" ReadOnly="READ_ONLY"/>
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</Label>
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<Label Location="test">
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<Info Name="Test" ReadOnly="READ_ONLY"/>
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</Label>
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</Category>
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2
resources/project/root/fjRQtWiSIy7hIlj-Kmk87M7s21kp.xml
Normal file
2
resources/project/root/fjRQtWiSIy7hIlj-Kmk87M7s21kp.xml
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="Root" type="Categories"/>
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2
resources/project/root/qaw0eS1zuuY1ar9TdPn1GMfrjbQp.xml
Normal file
2
resources/project/root/qaw0eS1zuuY1ar9TdPn1GMfrjbQp.xml
Normal file
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="Root" type="Files"/>
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2
resources/project/rootp.xml
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2
resources/project/rootp.xml
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<?xml version='1.0' encoding='UTF-8'?>
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<Info/>
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@@ -0,0 +1,2 @@
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<?xml version='1.0' encoding='UTF-8'?>
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<Info/>
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BIN
soc_rfsoc_top.slx
Normal file
BIN
soc_rfsoc_top.slx
Normal file
Binary file not shown.
22
utilities/soc_rfsoc_init.m
Normal file
22
utilities/soc_rfsoc_init.m
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function soc_rfsoc_init(mdlPath)
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% Initialization fcn for the model. It sets the model-wide params
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% which are derived based on sample rate.
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% 'FrameSize and 'NumBuffers' variables are set during model
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% PreLoadFcn callback into base workspace. These two variables should be
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% changed directly at the MATLAB command
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% FrameSize = evalin('base','FrameSize');
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dacSampleRate = get_param([mdlPath '/RF Data Converter'], 'dacSampleRate');
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dacSampleRate = evalin('base', dacSampleRate)*1e6;
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dacSamplesPerCycle = str2double(get_param([mdlPath '/RF Data Converter'], 'dacSamplesPerCycle'));
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dacInterpolationMode = str2double(get_param([mdlPath '/RF Data Converter'], 'interpolationMode'));
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streamClkFrequency = dacSampleRate/(dacSamplesPerCycle*dacInterpolationMode);
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SampleTime = 1/streamClkFrequency;
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% derived model-wide variables set into base workspace.
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assignin('base','SampleTime', SampleTime);
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end
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6
utilities/soc_rfsoc_shutdown.m
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6
utilities/soc_rfsoc_shutdown.m
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clear FrameSize ...
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SampleTime ...
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downSamplingFactor ...
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NumBuffers ...
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SrcSel ...
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SrcSelReg;
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Block a user