updated doc: Tx subsystem
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# 📡 PL Tx Subsystem (Pulse Generator)
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# 📡 PL Tx Subsystem (Pulse & Continuous LFM Generator)
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[🏠 Project Home](../README.md)
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@@ -6,7 +6,7 @@
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## Overview
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The Tx subsystem implements a **pulse-based Linear Frequency Modulated (LFM) chirp generator** using a DDS/NCO architecture in the FPGA (PL).
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The Tx subsystem implements a **pulse-based and continuous Linear Frequency Modulated (LFM) chirp generator** using a DDS/NCO architecture in the FPGA (PL).
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The generator produces **complex baseband output**:
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@@ -24,7 +24,7 @@ pulse_gen_ctrl (FSM)
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↓
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tx_active
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↓
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Phase Increment Counter
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Phase Increment Logic
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↓
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NCO (DDS)
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↓
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@@ -32,6 +32,39 @@ Phase Increment Counter
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---
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## Operating Modes
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The subsystem now supports multiple Tx modes:
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### 1. Pulsed LFM (default)
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- Chirp generated only during pulse window
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- Phase resets at each pulse start
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- Standard radar burst operation
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---
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### 2. CW Mode (Continuous Wave)
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- `tx_active = 1` continuously
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- Generates a single-tone output
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- Achieved by setting constant phase increment
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---
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### 3. Continuous LFM (Workaround Implementation)
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- `tx_active` forced HIGH continuously
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- A **1-cycle LOW pulse** is inserted periodically
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- This LOW→HIGH transition **resets the NCO**
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Result:
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- Continuous chirp
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- Bounded bandwidth
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- Periodic repetition of LFM
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---
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## Chirp Generation Principle
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The chirp is generated using a second-order phase accumulator:
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@@ -72,7 +105,7 @@ States:
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## Timing Behavior
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Within each PRI:
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### Pulsed Mode
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|<------ PRI ------>|
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|<-- pulse -->| idle |
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@@ -80,7 +113,31 @@ Within each PRI:
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- tx_active = 1 → chirp output
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- tx_active = 0 → output zero
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Chirp is reset at each pulse start.
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---
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### Continuous LFM Mode
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tx_active behavior:
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1 1 1 1 1 0 1 1 1 1 ...
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- 1-cycle LOW inserted at end of chirp period
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- Rising edge resets NCO
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- Defines chirp repetition interval
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---
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## CW / Continuous LFM Implementation Details
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- CW mode bypasses FSM output
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- A dedicated counter generates periodic reset pulses
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- Reset timing is based on `pulse_width_cycles`
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Important:
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- Reset pulse is exactly **1 clock cycle**
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- Ensures deterministic NCO restart
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- Decoupled from PRI/FSM timing
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---
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@@ -97,7 +154,19 @@ Chirp is reset at each pulse start.
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- Deterministic timing (128 MHz)
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- Efficient DDS (adder-based)
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- Complex output (I/Q)
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- Supports burst-mode radar operation
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- Supports:
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- Pulsed radar mode
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- Continuous wave (CW)
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- Continuous LFM (periodic chirp)
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---
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## Design Notes
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- FSM controls **timing (when to transmit)**
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- NCO controls **frequency evolution**
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- Continuous LFM implemented via **tx_active edge reuse**
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- Minimal hardware overhead (no additional NCO logic)
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---
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