2 Commits

Author SHA1 Message Date
canisio
f221e14c2c updated Rx documentation 2026-04-13 16:47:42 -03:00
canisio
a01186484e Rx: standardize to Q1.15 and reduce channelizer output to 32-bit complex
- ADC/DAC set to fixdt(1,16,15)
- Channelizer output scaled from sFix25_En23 to Q1.15
- Data width reduced from 50b to 32b
- Validated channelizer and bypass paths

Model: TBm_capture.slx
2026-04-13 16:47:25 -03:00
2 changed files with 44 additions and 3 deletions

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@@ -86,10 +86,12 @@ Implementation typically uses:
### ADC Input
- Sampling rate: 4096 MSPS
- Data type: **fixdt(1,16,15)** (Q1.15 format)
### PFB Channelizer
- Decimation: 8
- Effective bandwidth: 512 MHz
- Input and internal scaling aligned to Q1.15 domain
### FFT
- Size: 512
@@ -103,10 +105,48 @@ Implementation typically uses:
---
## Numeric Format and Scaling
### System Standardization
The signal chain was standardized to a **Q1.15 fixed-point format (fixdt(1,16,15))**:
- DAC output uses Q1.15
- ADC input is reinterpreted as Q1.15 (Same Stored Integer)
- Channelizer input operates in this normalized domain
---
### Channelizer Output Scaling
- Native channelizer output: **sFix25_En23**
- Rescaled and quantized to: **fixdt(1,16,15)**
This conversion:
- Preserves signal dynamic range
- Maximizes fractional precision
- Uses rounding and saturation
- Aligns with system-wide numeric format
---
### Data Width Reduction
- Previous format: **50 bits per complex sample** (25 bits real + 25 bits imag)
- New format: **32 bits per complex sample** (16 bits real + 16 bits imag)
Benefits:
- Reduced AXI bandwidth
- Reduced FIFO usage
- More efficient DMA transfers
---
## AXI4-Stream Output
- Data type: uint64
- Packed real/imag
- Data type: uint32 (packed complex: 16-bit real + 16-bit imag)
- TLAST = frame boundary
---
@@ -114,7 +154,7 @@ Implementation typically uses:
## Data Format
- Frame size: 512 samples
- Complex values packed into uint64
- Complex samples packed into 32-bit words
---
@@ -123,6 +163,7 @@ Implementation typically uses:
- Fully streaming pipeline
- High throughput
- Deterministic latency
- Consistent fixed-point scaling (Q1.15 end-to-end)
- Supports dual-mode operation (channelizer / bypass)
---