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37 Commits
v1.1
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2b7d05b3d9
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BIN
block_capture/TBm_capture.slx
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BIN
block_capture/TBm_capture.slx
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@@ -86,10 +86,12 @@ Implementation typically uses:
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### ADC Input
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- Sampling rate: 4096 MSPS
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- Data type: **fixdt(1,16,15)** (Q1.15 format)
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### PFB Channelizer
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- Decimation: 8
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- Effective bandwidth: 512 MHz
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- Input and internal scaling aligned to Q1.15 domain
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### FFT
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- Size: 512
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@@ -103,10 +105,48 @@ Implementation typically uses:
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---
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## Numeric Format and Scaling
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### System Standardization
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The signal chain was standardized to a **Q1.15 fixed-point format (fixdt(1,16,15))**:
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- DAC output uses Q1.15
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- ADC input is reinterpreted as Q1.15 (Same Stored Integer)
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- Channelizer input operates in this normalized domain
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---
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### Channelizer Output Scaling
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- Native channelizer output: **sFix25_En23**
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- Rescaled and quantized to: **fixdt(1,16,15)**
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This conversion:
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- Preserves signal dynamic range
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- Maximizes fractional precision
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- Uses rounding and saturation
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- Aligns with system-wide numeric format
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---
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### Data Width Reduction
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- Previous format: **50 bits per complex sample** (25 bits real + 25 bits imag)
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- New format: **32 bits per complex sample** (16 bits real + 16 bits imag)
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Benefits:
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- Reduced AXI bandwidth
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- Reduced FIFO usage
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- More efficient DMA transfers
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---
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## AXI4-Stream Output
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- Data type: uint64
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- Packed real/imag
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- Data type: uint32 (packed complex: 16-bit real + 16-bit imag)
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- TLAST = frame boundary
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---
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@@ -114,7 +154,7 @@ Implementation typically uses:
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## Data Format
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- Frame size: 512 samples
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- Complex values packed into uint64
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- Complex samples packed into 32-bit words
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---
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@@ -123,6 +163,7 @@ Implementation typically uses:
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- Fully streaming pipeline
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- High throughput
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- Deterministic latency
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- Consistent fixed-point scaling (Q1.15 end-to-end)
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- Supports dual-mode operation (channelizer / bypass)
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---
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@@ -1,2 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info Ref="bypass_block" Type="Relative"/>
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@@ -1,2 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="088fd74d-4620-4cf8-826f-495fb91d19ae" type="Reference"/>
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@@ -0,0 +1,2 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info Ref="block_pulsegen" Type="Relative"/>
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@@ -0,0 +1,2 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="6a9c972f-52d5-42e0-8c82-940b26905df7" type="Reference"/>
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@@ -1,2 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info Ref="capture_block" Type="Relative"/>
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@@ -1,2 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="14d75155-da33-4258-97c9-15567dccec3d" type="Reference"/>
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@@ -0,0 +1,2 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info Ref="block_bypass" Type="Relative"/>
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@@ -0,0 +1,2 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="f7229047-4926-407b-902a-a25e790af1a9" type="Reference"/>
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@@ -1,2 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info Ref="pulsegen_block" Type="Relative"/>
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@@ -1,2 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="e221a7ac-a0f0-4b2d-8909-e0ce275dca2e" type="Reference"/>
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@@ -0,0 +1,2 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info Ref="block_capture" Type="Relative"/>
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@@ -0,0 +1,2 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="c26ab781-2c03-423c-8199-bc6903e4e4f7" type="Reference"/>
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@@ -1,2 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info File="gm_soc_rfsoc_top_sw.slx" GroupUUID="default" Icon="" Name="Open Interface model" Type="Basic" Visible="1"/>
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@@ -1,2 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="881a1955-5626-41b7-9355-a04f7db84232" type="EntryPoint"/>
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@@ -1,2 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="capture_block" type="File"/>
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@@ -1,2 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="bypass_block" type="File"/>
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@@ -0,0 +1,2 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="block_pulsegen" type="File"/>
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@@ -1,2 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="pulsegen_block" type="File"/>
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@@ -0,0 +1,2 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="block_capture" type="File"/>
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@@ -0,0 +1,2 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="block_bypass" type="File"/>
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@@ -24,11 +24,11 @@ NCOCountIncDT = numerictype(1,NCOAccumWL*2,NCOAccumWL);
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%% Test signal parameters
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% Pulse width
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pulseWidth = 4e-6;
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pulseWidth = 0.001;%4e-6;
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% Pulse start/end frequencies
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pulseCentFreq = 100e6;
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pulseBw = 5e6; % Pulse bandwidth
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pulseCentFreq = 0e6;
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pulseBw = 0e6; % Pulse bandwidth
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% Number of pulses
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numPulses = 10;
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@@ -40,18 +40,21 @@ PRI = 1/PRF;
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% CW mode (bypass pulse generation)
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CwMode = true;
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% Counter mode (bypass pulse and CW generation)
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CounterMode = true;
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% Output gain
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pulseGenGain = 1;
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%% Software parameters
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% Signal generator update rate
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TsSW = 0.5e-3;
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TsSW = 0.001;
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%% Simulation parameters
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% Sim run time
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stoptime = 10*TsSW;
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%stoptime = TsFPGA*(9 + 1*348 + 1 + 2*128 + 1); %10*TsSW; %TsFPGA*(1*128+348)
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%% Channelizer parameters
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@@ -74,8 +77,8 @@ channelizerCoeffs = channelizer.coeffs.Numerator;
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%Starting frequency for each channel
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%chanFStart = chanBW/2:chanBW:(fs/2-chanBW/2);
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%Number of frames out of channelzier
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nFrames = nChan/SamplesPerCycle;
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%Number of frames in the DPW
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nFrames = 4;%nChan/SamplesPerCycle;
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% Frame size after serializing x2
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%frameSize = SamplesPerCycle/2;
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