%% Check if top model is loaded
if ~bdIsLoaded('soc_rfsoc_top')
    load_system('soc_rfsoc_top');
end

%% Get parameters configured on the block 
IntDecFactor = str2double(get_param(['soc_rfsoc_top' '/RF Data Converter'], ...
    'interpolationMode')); % Interpolation and decimation factor
SamplesPerCycle = str2double(get_param(['soc_rfsoc_top' '/RF Data Converter'], ...
    'dacSamplesPerCycle')); % samples per FPGA cycle