canisio 0ea6881d1e Added bypass to Rx on FPGA. Test OK

2026-03-31 15:55:46 -03:00

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soc_rfsoc_fpga.slx

Added bypass to Rx on FPGA. Test OK

2026-03-31 15:55:46 -03:00

soc_rfsoc_proc.slx

Added testbench for simulink model. Added f0 option to both testbenches

2026-03-30 16:01:46 -03:00