canisio 293b0e6c50 Updated memory mapped addresses

2026-04-22 10:45:07 -03:00

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soc_rfsoc_fpga.slx

4 dalay on the signals of bypass to align test counter to frame start. Appears to be working. Test on board.

2026-04-22 10:30:14 -03:00

soc_rfsoc_proc.slx

Updated memory mapped addresses

2026-04-22 10:45:07 -03:00