detailed subsystems

docs/pl_rx_subsystem.md

@@ -1,35 +1,82 @@
 # 📡 PL Rx Subsystem (Channelizer)
 
+[🏠 Project Home](../README.md)
+
+---
+
 ## Overview
 
-Implements PFB channelizer and FFT processing.
+The Rx subsystem implements a **polyphase filter bank (PFB) channelizer** followed by FFT processing.
+
+It converts wideband ADC input into frequency-domain channels.
 
 ---
 
 ## Architecture
 
-ADC → PFB → FFT → Capture → FIFO → AXI → DMA
+ADC
+ ↓
+PFB Channelizer (Decimation + Filtering)
+ ↓
+FFT (512 bins)
+ ↓
+FFT Capture
+ ↓
+FIFO Serializer (4 → 1)
+ ↓
+AXI4-Stream
+ ↓
+DMA
 
 ---
 
-## Processing
+## Processing Chain
 
-- 4096 MSPS input
-- Decimation 8
-- FFT 512 bins
+### ADC Input
+- Sampling rate: 4096 MSPS
+
+### PFB Channelizer
+- Decimation: 8
+- Effective bandwidth: 512 MHz
+
+### FFT
+- Size: 512
+- Produces frequency bins
+
+### FFT Capture
+- Controls frame boundaries
+
+### FIFO Serializer
+- Converts parallel streams into single stream
 
 ---
 
-## Output
+## AXI4-Stream Output
 
-- AXI4-Stream
-- uint64 format
-- TLAST per frame
+- Data type: uint64
+- Packed real/imag
+- TLAST = frame boundary
+
+---
+
+## Data Format
+
+- Frame size: 512 samples
+- Complex values packed into uint64
+
+---
+
+## Key Characteristics
+
+- Fully streaming pipeline
+- High throughput
+- Deterministic latency
+- DMA-ready output
 
 ---
 
 ## 🔗 Related Components
 
-- [Project Overview (README)](../README.md)
+- [🏠 Project Home](../README.md)
 - [PL Tx Subsystem](pl_tx_subsystem.md)
 - [PS Subsystem](ps_subsystem.md)