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Zcu111ResmReceiver/docs/pl_rx_subsystem.md
2026-04-02 17:36:23 -03:00

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📡 PL Rx Subsystem (Channelizer)

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Overview

The Rx subsystem implements a polyphase filter bank (PFB) channelizer followed by FFT processing.

It converts wideband ADC input into frequency-domain channels.


Architecture

ADC ↓ PFB Channelizer (Decimation + Filtering) ↓ FFT (512 bins) ↓ FFT Capture ↓ FIFO Serializer (4 → 1) ↓ AXI4-Stream ↓ DMA


Processing Chain

ADC Input

  • Sampling rate: 4096 MSPS

PFB Channelizer

  • Decimation: 8
  • Effective bandwidth: 512 MHz

FFT

  • Size: 512
  • Produces frequency bins

FFT Capture

  • Controls frame boundaries

FIFO Serializer

  • Converts parallel streams into single stream

AXI4-Stream Output

  • Data type: uint64
  • Packed real/imag
  • TLAST = frame boundary

Data Format

  • Frame size: 512 samples
  • Complex values packed into uint64

Key Characteristics

  • Fully streaming pipeline
  • High throughput
  • Deterministic latency
  • DMA-ready output