6 Commits

Author	SHA1	Message	Date
canisio	3748b65872	implemented sample packer to construct 128 AXI. Partially working (only bypass works?)	2026-04-14 12:25:01 -03:00
canisio	d83006c50c	Added counter as input for the TBm_capture	2026-04-14 10:32:02 -03:00
canisio	5e5bba3ce6	Stable 16-bit Q1.15 Rx chain before AXI width upgrade	2026-04-14 09:25:01 -03:00
canisio	a01186484e	Rx: standardize to Q1.15 and reduce channelizer output to 32-bit complex ... - ADC/DAC set to fixdt(1,16,15) - Channelizer output scaled from sFix25_En23 to Q1.15 - Data width reduced from 50b to 32b - Validated channelizer and bypass paths Model: TBm_capture.slx	2026-04-13 16:47:25 -03:00
canisio	4241699c3d	TBm_caputre. changed PFB internals and output datatype	2026-04-09 12:43:32 -03:00
canisio	2e570cee8b	Created folder and test bench model for new capture block. Copied from current version.	2026-04-08 15:50:59 -03:00