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v2.0
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27
README.md
27
README.md
@@ -11,21 +11,34 @@ The system implements a high-throughput signal chain in the FPGA (PL) and perfor
|
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## Current Status
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- Tx subsystem: LFM pulse generator (DDS-based, complex output)
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- Rx subsystem: fully functional channelizer pipeline (PFB-based)
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- Rx subsystem: fully functional channelizer pipeline (PFB-based) or bypass
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- PL → PS interface: AXI4-Stream + DMA operational
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- PS processing: frame-based algorithm (RMS + peak detection)
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- PS processing: frame-based algorithm on a Data Process Window (DPW)
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|
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---
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## System Architecture
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ADC → Channelizer (PFB, 512 bins)
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→ FFT_Capture (frame control)
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→ FIFO Serializer (4 FIFOs → 1 stream)
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→ AXI4-Stream (uint64)
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Tx (PL)
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→ Waveform Generator (LFM / CW / Pulsed)
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→ DAC
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→ RF Loopback / Input
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Rx (PL)
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→ ADC
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→ Channelizer (PFB, 512 bins) / Bypass / Counter
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→ Capture (frame control)
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→ AXI4-Stream (128-bit, 4 samples/clock)
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→ DMA (S2MM)
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→ PS Memory
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→ Processor Algorithm
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→ Processor Algorithm
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Post Processing (PS)
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→ Triggered Capture
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→ Sample Unpacking (I/Q)
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→ Data Reshaping → [FrameSize x nFrames x nTriggers]
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→ Host Communication / Processing / Visualization
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→ One DPW is a windows of FrameSize x nFrames samples
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---
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@@ -6,11 +6,9 @@
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## Overview
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The Rx subsystem implements a **polyphase filter bank (PFB) channelizer** followed by FFT processing.
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The Rx subsystem implements a **polyphase filter bank (PFB) channelizer** followed by FFT processing, a **bypass path**, and a **multi-frame capture pipeline**.
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It converts wideband ADC input into frequency-domain channels and streams the result to the PS.
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A **bypass path** is also available for raw data inspection and debugging.
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It converts wideband ADC input into frequency-domain channels (or raw samples via bypass) and streams the result to the PS.
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---
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@@ -18,67 +16,46 @@ A **bypass path** is also available for raw data inspection and debugging.
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### Channelizer Path (default)
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ADC
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↓
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PFB Channelizer (Decimation + Filtering)
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↓
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FFT (512 bins)
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↓
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FFT Capture
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↓
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FIFO Serializer (4 → 1)
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↓
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AXI4-Stream
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↓
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ADC
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↓
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PFB Channelizer (Decimation + Filtering)
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↓
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FFT (512 bins)
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↓
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Capture (frame control)
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↓
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AXI4-Stream (128-bit, 4 samples/clock)
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↓
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DMA
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---
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### Bypass Path (Debug / Raw Data)
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ADC
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↓
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Bypass Path
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↓
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FIFO / Serializer
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↓
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AXI4-Stream
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↓
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ADC
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↓
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||||
Bypass Path
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↓
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Capture (frame control)
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↓
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AXI4-Stream (128-bit, 4 samples/clock)
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↓
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DMA
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---
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## Bypass Functionality
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## Capture Pipeline
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The bypass allows direct observation of the input signal without channelization.
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### Purpose
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- Debugging and validation
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- Access to raw ADC-domain data
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- Comparison with channelized output
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- Verification of downstream processing
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|
||||
---
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||||
- Multi-frame acquisition (configurable nFrames)
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- Frame size: 512 samples
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- Supports asynchronous capture start (not frame-aligned)
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- TLAST asserted at frame boundaries
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|
||||
### Behavior
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||||
- Input data is routed directly to output
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- No filtering or FFT applied
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- Maintains same output interface (AXI4-Stream)
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||||
|
||||
---
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||||
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### Selection Mechanism
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A selector signal chooses between:
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- Channelizer output (normal operation)
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- Bypass output (raw data)
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||||
|
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Implementation typically uses:
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- Parallel paths
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- Output switching logic
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- First frame may be partial
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- Frames may contain ≤ 2 frame indices (expected)
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- DPW spans nFrames frames but covers nFrames + 1 frame regions
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---
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@@ -86,22 +63,19 @@ Implementation typically uses:
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### ADC Input
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- Sampling rate: 4096 MSPS
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- Data type: **fixdt(1,16,15)** (Q1.15 format)
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- Data type: **fixdt(1,16,15)** (Q1.15)
|
||||
|
||||
### PFB Channelizer
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- Decimation: 8
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- Effective bandwidth: 512 MHz
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- Input and internal scaling aligned to Q1.15 domain
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||||
|
||||
### FFT
|
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- Size: 512
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- Produces frequency bins
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||||
|
||||
### FFT Capture
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- Controls frame boundaries
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||||
|
||||
### FIFO Serializer
|
||||
- Converts parallel streams into single stream
|
||||
### Capture
|
||||
- Defines frame boundaries (512 samples)
|
||||
- Generates TLAST
|
||||
|
||||
---
|
||||
|
||||
@@ -109,62 +83,57 @@ Implementation typically uses:
|
||||
|
||||
### System Standardization
|
||||
|
||||
The signal chain was standardized to a **Q1.15 fixed-point format (fixdt(1,16,15))**:
|
||||
|
||||
- DAC output uses Q1.15
|
||||
- ADC input is reinterpreted as Q1.15 (Same Stored Integer)
|
||||
- Channelizer input operates in this normalized domain
|
||||
|
||||
---
|
||||
- End-to-end Q1.15 (**fixdt(1,16,15)**)
|
||||
|
||||
### Channelizer Output Scaling
|
||||
|
||||
- Native channelizer output: **sFix25_En23**
|
||||
- Rescaled and quantized to: **fixdt(1,16,15)**
|
||||
|
||||
This conversion:
|
||||
|
||||
- Preserves signal dynamic range
|
||||
- Maximizes fractional precision
|
||||
- Uses rounding and saturation
|
||||
- Aligns with system-wide numeric format
|
||||
- Native: **sFix25_En23**
|
||||
- Quantized to: **fixdt(1,16,15)** (round + saturate)
|
||||
|
||||
---
|
||||
|
||||
### Data Width Reduction
|
||||
## Data Packing (Updated)
|
||||
|
||||
- Previous format: **50 bits per complex sample** (25 bits real + 25 bits imag)
|
||||
- New format: **32 bits per complex sample** (16 bits real + 16 bits imag)
|
||||
- 4 samples per clock
|
||||
- Each sample: complex (16-bit real + 16-bit imag)
|
||||
- Packed into **128-bit AXI4-Stream word**
|
||||
|
||||
Benefits:
|
||||
|
||||
- Reduced AXI bandwidth
|
||||
- Reduced FIFO usage
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||||
- More efficient DMA transfers
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||||
- Matches datapath parallelism
|
||||
- Efficient DMA transfers
|
||||
- Eliminates need for serializer stage
|
||||
|
||||
---
|
||||
|
||||
## AXI4-Stream Output
|
||||
|
||||
- Data type: uint32 (packed complex: 16-bit real + 16-bit imag)
|
||||
- Width: 128 bits
|
||||
- Contains 4 complex samples per cycle
|
||||
- TLAST = frame boundary
|
||||
|
||||
---
|
||||
|
||||
## Data Format
|
||||
## Debug / Validation Features
|
||||
|
||||
- Frame size: 512 samples
|
||||
- Complex samples packed into 32-bit words
|
||||
A counter-based debug mode is implemented:
|
||||
|
||||
- Real part → sample counter (0..511)
|
||||
- Imag part → frame index
|
||||
|
||||
Used to validate:
|
||||
- Sample continuity
|
||||
- Frame boundaries
|
||||
- DMA ordering and integrity
|
||||
|
||||
---
|
||||
|
||||
## Key Characteristics
|
||||
|
||||
- Fully streaming pipeline
|
||||
- High throughput
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||||
- Deterministic latency
|
||||
- Consistent fixed-point scaling (Q1.15 end-to-end)
|
||||
- Supports dual-mode operation (channelizer / bypass)
|
||||
- High throughput (4 samples/clock)
|
||||
- Dual-mode operation (channelizer / bypass)
|
||||
- Validated up to nFrames = 1024
|
||||
|
||||
---
|
||||
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
# 🧠 PS Subsystem (Control + Processing)
|
||||
# 🧠 PS Subsystem (Control + Capture + Processing)
|
||||
|
||||
[🏠 Project Home](../README.md)
|
||||
|
||||
@@ -8,73 +8,128 @@
|
||||
|
||||
The PS subsystem is responsible for:
|
||||
|
||||
- System initialization
|
||||
- Configuring PL subsystems
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||||
- Triggering captures
|
||||
- Receiving data via DMA
|
||||
- Performing frame-based processing
|
||||
- Preparing data for processing and visualization
|
||||
|
||||
The current implementation acts as a **placeholder for post-processing**, focusing on reliable data acquisition and host interaction.
|
||||
|
||||
---
|
||||
|
||||
## Responsibilities
|
||||
|
||||
### Control
|
||||
### Control & Initialization
|
||||
|
||||
- Writes parameters to PL registers:
|
||||
- Tx generator configuration
|
||||
- Generates TxPulseStart trigger
|
||||
- Configure PL parameters:
|
||||
- Tx waveform configuration
|
||||
- Capture parameters (nFrames, etc.)
|
||||
- Initialize DMA and memory buffers
|
||||
- Manage system startup
|
||||
|
||||
---
|
||||
|
||||
### Trigger & Capture
|
||||
|
||||
- Generates capture trigger (software-controlled)
|
||||
- Controls DPW acquisition timing
|
||||
- Each trigger initiates one DPW capture
|
||||
|
||||
---
|
||||
|
||||
### DMA Handling
|
||||
|
||||
- AXI4-Stream → DMA (S2MM)
|
||||
- Data stored in PS DDR
|
||||
- Receives **128-bit stream** (4 samples per clock)
|
||||
- Stores data in PS DDR memory
|
||||
|
||||
Configuration:
|
||||
- Frame size: 512
|
||||
- Buffers: 16
|
||||
- Frame size: 512 samples
|
||||
- nFrames: configurable (validated up to 1024)
|
||||
|
||||
---
|
||||
|
||||
### Processing Pipeline
|
||||
## Data Format
|
||||
|
||||
DMA → uint64[512]
|
||||
→ unpack real/imag
|
||||
→ convert to complex
|
||||
→ RMS + peak detection
|
||||
### Raw DMA Data
|
||||
|
||||
- Packed complex samples
|
||||
- 16-bit real + 16-bit imag per sample
|
||||
- 4 samples per 128-bit word
|
||||
|
||||
---
|
||||
|
||||
### Processing Representation
|
||||
|
||||
Data is unpacked and reshaped into:
|
||||
|
||||
```
|
||||
[FrameSize x nFrames x nTriggers]
|
||||
```
|
||||
|
||||
---
|
||||
|
||||
## Processing Pipeline (Current)
|
||||
|
||||
DMA
|
||||
→ Unpack samples (I/Q separation)
|
||||
→ Convert to complex representation
|
||||
→ Reshape into 3D structure
|
||||
→ Visualization / basic analysis
|
||||
|
||||
---
|
||||
|
||||
## Validation Support
|
||||
|
||||
Uses counter-based validation:
|
||||
|
||||
- Real part → sample counter
|
||||
- Imag part → frame index
|
||||
|
||||
Enables verification of:
|
||||
|
||||
- Data continuity
|
||||
- Frame alignment
|
||||
- Correct ordering from DMA
|
||||
|
||||
---
|
||||
|
||||
## Execution Model
|
||||
|
||||
- Event-driven (DMA trigger)
|
||||
- No buffering queue
|
||||
- Frames may be dropped
|
||||
- Triggered (event-based)
|
||||
- Burst capture (DPW)
|
||||
- Not continuous real-time streaming
|
||||
|
||||
---
|
||||
|
||||
## Performance Notes
|
||||
|
||||
- Bottleneck: unpacking + conversion
|
||||
- Cannot sustain full-rate input
|
||||
- Designed for correctness and validation (not optimized)
|
||||
- Bottleneck: unpacking + data movement
|
||||
- Full-rate continuous processing not supported
|
||||
|
||||
---
|
||||
|
||||
## Interaction with PL
|
||||
## Role in System
|
||||
|
||||
### Tx Control
|
||||
- Low-rate trigger (~Hz)
|
||||
- Starts burst generation
|
||||
The PS currently serves as:
|
||||
|
||||
### Rx Data
|
||||
- Continuous high-rate stream
|
||||
- Control interface
|
||||
- Data acquisition manager
|
||||
- Pre-processing stage
|
||||
|
||||
Future implementations will replace the current processing with advanced algorithms (e.g., FrFT).
|
||||
|
||||
---
|
||||
|
||||
## Future Work
|
||||
|
||||
- Replace processing with FrFT
|
||||
- NEON optimization
|
||||
- Throughput improvements
|
||||
- FrFT-based processing
|
||||
- Timestamp integration
|
||||
- UDP streaming
|
||||
- Optimization (NEON / vectorization)
|
||||
- Metadata extraction (move complexity to PL)
|
||||
|
||||
---
|
||||
|
||||
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
@@ -1,2 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="TBc_lfm_fracF.m" type="File"/>
|
||||
@@ -1,2 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="fracF_cg.m" type="File"/>
|
||||
@@ -1,2 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="bizinter.m" type="File"/>
|
||||
@@ -1,6 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info>
|
||||
<Category UUID="FileClassCategory">
|
||||
<Label UUID="design"/>
|
||||
</Category>
|
||||
</Info>
|
||||
@@ -1,2 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="fracF_ref.m" type="File"/>
|
||||
@@ -1,6 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info>
|
||||
<Category UUID="FileClassCategory">
|
||||
<Label UUID="design"/>
|
||||
</Category>
|
||||
</Info>
|
||||
@@ -1,2 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="TBm_lfm_fracF.slx" type="File"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="post_processing" type="File"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info Ref="codegen_frft/codegen/mex/fracF_cg/interface" Type="Relative"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="4a7e46c8-b608-4097-9e1f-6b08f40b724c" type="Reference"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info Ref="codegen_frft" Type="Relative"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="e5067e19-daed-4732-909a-6dc210e105d6" type="Reference"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info Ref="codegen_frft/codegen" Type="Relative"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="7593a6a4-6687-4364-8723-1bc8794d0177" type="Reference"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info Ref="codegen_frft/codegen/mex" Type="Relative"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="732585ee-100e-439f-988e-c97de5008a4c" type="Reference"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info Ref="utilities/post_processing" Type="Relative"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="5bfc0575-1eef-448a-a3a2-ced40deb5860" type="Reference"/>
|
||||
@@ -1,2 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info Ref="frft_codegen" Type="Relative"/>
|
||||
@@ -1,2 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="7b5b7cf9-d79f-4236-86f3-d37f9b8a15b3" type="Reference"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info Ref="codegen_frft/codegen/mex/fracF_cg" Type="Relative"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="81080468-b05c-494e-b13d-b9983b9ef350" type="Reference"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="checkTimeSamples.m" type="File"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="checkFreqSamples.m" type="File"/>
|
||||
@@ -0,0 +1,2 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="checkCounterSamples.m" type="File"/>
|
||||
@@ -1,2 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Info location="frft_codegen" type="File"/>
|
||||
Binary file not shown.
116
utilities/post_processing/checkCounterSamples.m
Normal file
116
utilities/post_processing/checkCounterSamples.m
Normal file
@@ -0,0 +1,116 @@
|
||||
%% =========================================================
|
||||
% Data
|
||||
% =========================================================
|
||||
clc;
|
||||
X = raw_DPW.Data; % [512 x nFrames x nTime]
|
||||
|
||||
% Remove first DPW if needed (initialization artifact)
|
||||
X = X(:,:,2:end);
|
||||
|
||||
[nSamples, nFrames_cfg, nTime] = size(X);
|
||||
|
||||
%% =========================================================
|
||||
% PARAMETERS
|
||||
% =========================================================
|
||||
COUNTER_MAX = 511; % counter: 0..511
|
||||
|
||||
%% =========================================================
|
||||
% VALIDATION
|
||||
% =========================================================
|
||||
for t = 1:nTime
|
||||
|
||||
fprintf('\n=== Checking DPW %d ===\n', t);
|
||||
|
||||
X_dpw = X(:,:,t);
|
||||
|
||||
% Flatten stream
|
||||
x_seq = reshape(X_dpw, [], 1);
|
||||
|
||||
% Extract stored integers
|
||||
real_seq = double(storedInteger(real(x_seq))); % sample counter
|
||||
frame_seq = double(storedInteger(imag(x_seq))); % frame index
|
||||
|
||||
%% -----------------------------------------------------
|
||||
% 1. Sample progression
|
||||
% -----------------------------------------------------
|
||||
d_real = diff(real_seq);
|
||||
|
||||
valid_steps = (d_real == 1) | (d_real == -COUNTER_MAX);
|
||||
|
||||
if all(valid_steps)
|
||||
fprintf('✔ Sample progression OK\n');
|
||||
else
|
||||
idx = find(~valid_steps, 1);
|
||||
fprintf('❌ Sample progression ERROR at index %d\n', idx);
|
||||
end
|
||||
|
||||
%% -----------------------------------------------------
|
||||
% 2. Detect counter wraps (511 → 0)
|
||||
% -----------------------------------------------------
|
||||
wrap_idx = find(real_seq(1:end-1) == COUNTER_MAX & real_seq(2:end) == 0);
|
||||
|
||||
fprintf('Detected wraps: %d (configured: %d)\n', ...
|
||||
length(wrap_idx), nFrames_cfg);
|
||||
|
||||
if length(wrap_idx) == nFrames_cfg
|
||||
fprintf('✔ Wrap count matches configuration\n');
|
||||
else
|
||||
fprintf('❌ Wrap count mismatch\n');
|
||||
end
|
||||
|
||||
%% -----------------------------------------------------
|
||||
% 3. Check frame increment at wraps (no wrap logic)
|
||||
% -----------------------------------------------------
|
||||
ok_wrap = true;
|
||||
|
||||
for k = 1:length(wrap_idx)
|
||||
|
||||
i = wrap_idx(k);
|
||||
|
||||
f_before = frame_seq(i);
|
||||
f_after = frame_seq(i+1);
|
||||
|
||||
if f_after ~= f_before + 1
|
||||
fprintf('❌ Frame increment error at idx %d (%d → %d)\n', ...
|
||||
i, f_before, f_after);
|
||||
ok_wrap = false;
|
||||
break;
|
||||
end
|
||||
|
||||
end
|
||||
|
||||
if ok_wrap
|
||||
fprintf('✔ Frame increments correctly at all wraps\n');
|
||||
end
|
||||
|
||||
%% -----------------------------------------------------
|
||||
% 4. Informative: frame regions (+1 effect)
|
||||
% -----------------------------------------------------
|
||||
d_frame = diff(frame_seq);
|
||||
nFrames_detected = sum(d_frame == 1) + 1;
|
||||
|
||||
fprintf('Frame regions (including partial): %d (expected: %d + 1)\n', ...
|
||||
nFrames_detected, nFrames_cfg);
|
||||
|
||||
%% -----------------------------------------------------
|
||||
% 5. Optional: per-frame sanity (≤2 indices)
|
||||
% -----------------------------------------------------
|
||||
frame_idx_matrix = storedInteger(imag(X_dpw));
|
||||
|
||||
frame_ok = true;
|
||||
|
||||
for f = 1:nFrames_cfg
|
||||
u = unique(frame_idx_matrix(:,f));
|
||||
|
||||
if length(u) > 2
|
||||
fprintf('❌ Frame %d has >2 frame indices\n', f);
|
||||
frame_ok = false;
|
||||
break;
|
||||
end
|
||||
end
|
||||
|
||||
if frame_ok
|
||||
fprintf('✔ Frame structure OK (≤2 indices per frame)\n');
|
||||
end
|
||||
|
||||
end
|
||||
87
utilities/post_processing/checkFreqSamples.m
Normal file
87
utilities/post_processing/checkFreqSamples.m
Normal file
@@ -0,0 +1,87 @@
|
||||
%% =========================================================
|
||||
% Data
|
||||
% =========================================================
|
||||
X = single(raw_DPW.Data); % [512 x nFrames x nTime]
|
||||
X = X(:,:,2:end); % First DPW is zeroed
|
||||
X = 2*X; % Rescale (see channelizer block on PL)
|
||||
|
||||
[nSamples, nFrames, nTime] = size(X);
|
||||
N = nSamples;
|
||||
|
||||
%% =========================================================
|
||||
% Parameters
|
||||
% =========================================================
|
||||
Fs = 512e6; % Hz
|
||||
|
||||
f_axis = (-N/2 : N/2-1) * (Fs/N) / 1e6; % MHz
|
||||
|
||||
%% =========================================================
|
||||
% Apply fftshift per frame (dim = 1)
|
||||
% =========================================================
|
||||
X_shift = fftshift(X, 1);
|
||||
|
||||
%% =========================================================
|
||||
% Convert to power
|
||||
% =========================================================
|
||||
P = abs(X_shift).^2;
|
||||
|
||||
%% =========================================================
|
||||
% OPTION 1 — Mean Spectrum (over frames AND time)
|
||||
% =========================================================
|
||||
P_mean = mean(P, [2 3]); % average over frames and triggers
|
||||
P_mean = squeeze(P_mean); % [512 x 1]
|
||||
|
||||
figure;
|
||||
plot(f_axis, 10*log10(P_mean + 1e-12), 'LineWidth', 1.5);
|
||||
grid on;
|
||||
|
||||
xlabel('Frequency (MHz)');
|
||||
ylabel('Power (dB)');
|
||||
title('Mean Channelized Spectrum (Frames + Time)');
|
||||
|
||||
%% =========================================================
|
||||
% OPTION 2 — Max Spectrum (detect intermittent peaks)
|
||||
% =========================================================
|
||||
P_max = max(P, [], [2 3]);
|
||||
P_max = squeeze(P_max);
|
||||
|
||||
figure;
|
||||
plot(f_axis, 10*log10(P_max + 1e-12), 'LineWidth', 1.5);
|
||||
grid on;
|
||||
|
||||
xlabel('Frequency (MHz)');
|
||||
ylabel('Power (dB)');
|
||||
title('Max Channelized Spectrum (Frames + Time)');
|
||||
|
||||
%% =========================================================
|
||||
% OPTION 3 — Time-Frequency Visualization
|
||||
% =========================================================
|
||||
% Collapse frames → keep time evolution
|
||||
P_time = squeeze(mean(P, 2)); % [512 x nTime]
|
||||
|
||||
figure;
|
||||
surf(1:nTime, f_axis, 10*log10(P_time + 1e-12), 'EdgeColor','none');
|
||||
view(2);
|
||||
axis tight;
|
||||
|
||||
xlabel('Trigger Index');
|
||||
ylabel('Frequency (MHz)');
|
||||
title('Channelizer Output Over Time');
|
||||
colorbar;
|
||||
|
||||
%% =========================================================
|
||||
% OPTIONAL — Frame evolution inside a single trigger
|
||||
% =========================================================
|
||||
t_sel = nTime; % pick last capture
|
||||
|
||||
P_frame = squeeze(P(:,:,t_sel)); % [512 x nFrames]
|
||||
|
||||
figure;
|
||||
surf(1:nFrames, f_axis, 10*log10(P_frame + 1e-12), 'EdgeColor','none');
|
||||
view(2);
|
||||
axis tight;
|
||||
|
||||
xlabel('Frame Index');
|
||||
ylabel('Frequency (MHz)');
|
||||
title(['Channelizer Output Within DPW (Trigger ', num2str(t_sel), ')']);
|
||||
colorbar;
|
||||
84
utilities/post_processing/checkTimeSamples.m
Normal file
84
utilities/post_processing/checkTimeSamples.m
Normal file
@@ -0,0 +1,84 @@
|
||||
%% =========================================================
|
||||
% Data
|
||||
% =========================================================
|
||||
X = single(raw_DPW.Data);
|
||||
X = X(:,:,1:end); % first DPW useless (zeroed)
|
||||
|
||||
%% =========================================================
|
||||
% Parameters
|
||||
% =========================================================
|
||||
Fs = 512e6; % Sampling rate (Hz)
|
||||
N = 512; % Frame size
|
||||
|
||||
% Your data variable (rename if needed)
|
||||
% Expected size: [512 x 4 x 8]
|
||||
% X(frameSamples, frameIndex, timeIndex)
|
||||
% Example: X = your_workspace_variable;
|
||||
|
||||
[nSamples, nFrames, nTime] = size(X);
|
||||
|
||||
%% =========================================================
|
||||
% FFT Computation
|
||||
% =========================================================
|
||||
FFT_all = zeros(N, nFrames*nTime);
|
||||
|
||||
idx = 1;
|
||||
|
||||
for t = 1:nTime
|
||||
for f = 1:nFrames
|
||||
|
||||
x = X(:, f, t);
|
||||
|
||||
% Optional window (uncomment if needed)
|
||||
% w = hann(N);
|
||||
% x = x .* w;
|
||||
|
||||
Xf = fftshift(fft(x));
|
||||
FFT_all(:, idx) = abs(Xf);
|
||||
|
||||
idx = idx + 1;
|
||||
end
|
||||
end
|
||||
|
||||
%% =========================================================
|
||||
% Axes
|
||||
% =========================================================
|
||||
f_axis = (-N/2 : N/2-1) * (Fs/N) / 1e6; % MHz
|
||||
t_axis = 1:(nFrames*nTime); % frame index
|
||||
|
||||
%% =========================================================
|
||||
% Spectrogram-like view (BEST)
|
||||
% =========================================================
|
||||
figure;
|
||||
surf(t_axis, f_axis, 20*log10(FFT_all + 1e-12), 'EdgeColor', 'none');
|
||||
view(2);
|
||||
axis tight;
|
||||
|
||||
xlabel('Frame index');
|
||||
ylabel('Frequency (MHz)');
|
||||
title('FFT over time (per frame)');
|
||||
colorbar;
|
||||
|
||||
%% =========================================================
|
||||
% 3D Visualization (optional)
|
||||
% =========================================================
|
||||
figure;
|
||||
surf(t_axis, f_axis, FFT_all, 'EdgeColor', 'none');
|
||||
xlabel('Frame index');
|
||||
ylabel('Frequency (MHz)');
|
||||
zlabel('Magnitude');
|
||||
title('3D FFT evolution');
|
||||
|
||||
%% =========================================================
|
||||
% Single frame debug (optional)
|
||||
% =========================================================
|
||||
figure;
|
||||
x_dbg = X(:,end,end);
|
||||
Xf_dbg = fftshift(fft(x_dbg));
|
||||
|
||||
plot(f_axis, 20*log10(abs(Xf_dbg)+1e-12));
|
||||
grid on;
|
||||
|
||||
xlabel('Frequency (MHz)');
|
||||
ylabel('Magnitude (dB)');
|
||||
title('Single Frame FFT');
|
||||
@@ -23,38 +23,43 @@ NCOCountIncDT = numerictype(1,NCOAccumWL*2,NCOAccumWL);
|
||||
|
||||
%% Test signal parameters
|
||||
|
||||
% Pulse width
|
||||
pulseWidth = 0.001;%4e-6;
|
||||
|
||||
% Pulse start/end frequencies
|
||||
pulseCentFreq = 0e6;
|
||||
pulseBw = 0e6; % Pulse bandwidth
|
||||
pulseBw = 50e6; % Pulse bandwidth
|
||||
|
||||
% Number of pulses
|
||||
numPulses = 10;
|
||||
|
||||
% Pulse repetition interval
|
||||
PRF = 20e3;
|
||||
PRF = 7.5e3;
|
||||
PRI = 1/PRF;
|
||||
|
||||
% Pulse time duration
|
||||
%pulseT = 10; % use very long pulse help emulate CW
|
||||
pulseT = 10e-6;
|
||||
|
||||
% CW mode (bypass pulse generation)
|
||||
CwMode = true;
|
||||
%CwMode = false;
|
||||
|
||||
% Counter mode (bypass pulse and CW generation)
|
||||
CounterMode = true;
|
||||
%CounterMode = true;
|
||||
|
||||
% Output gain
|
||||
pulseGenGain = 1;
|
||||
|
||||
%% Software parameters
|
||||
%% Simulation/External Mode parameters (conditional)
|
||||
bd = bdroot; % Retrive which model is calling this function
|
||||
|
||||
% Signal generator update rate
|
||||
TsSW = 0.004;
|
||||
|
||||
%% Simulation parameters
|
||||
|
||||
% Sim run time
|
||||
%stoptime = TsFPGA*(9 + 1*348 + 1 + 2*128 + 1); %10*TsSW; %TsFPGA*(1*128+348)
|
||||
switch bd
|
||||
case 'soc_rfsoc_top'
|
||||
TsSW = 0.0005; % Signal generator and capture update rate
|
||||
StopTime = 0.0025; % Simulation total time
|
||||
case 'gm_soc_rfsoc_top_sw'
|
||||
TsSW = 0.5;
|
||||
StopTime = 10;
|
||||
otherwise
|
||||
error('rfsoc_init: InvalidModel (%s not supported).', bd);
|
||||
end
|
||||
|
||||
%% Channelizer parameters
|
||||
|
||||
@@ -78,7 +83,7 @@ channelizerCoeffs = channelizer.coeffs.Numerator;
|
||||
%chanFStart = chanBW/2:chanBW:(fs/2-chanBW/2);
|
||||
|
||||
%Number of frames in the DPW
|
||||
nFrames = 4;%nChan/SamplesPerCycle;
|
||||
nFrames = 1024;%nChan/SamplesPerCycle;
|
||||
|
||||
% Frame size after serializing x2
|
||||
%frameSize = SamplesPerCycle/2;
|
||||
@@ -1,5 +1,10 @@
|
||||
%% Check if top model is loaded
|
||||
if ~bdIsLoaded('soc_rfsoc_top')
|
||||
load_system('soc_rfsoc_top');
|
||||
end
|
||||
|
||||
%% Get parameters configured on the block
|
||||
IntDecFactor = str2double(get_param([bdroot '/RF Data Converter'], ...
|
||||
IntDecFactor = str2double(get_param(['soc_rfsoc_top' '/RF Data Converter'], ...
|
||||
'interpolationMode')); % Interpolation and decimation factor
|
||||
SamplesPerCycle = str2double(get_param([bdroot '/RF Data Converter'], ...
|
||||
SamplesPerCycle = str2double(get_param(['soc_rfsoc_top' '/RF Data Converter'], ...
|
||||
'dacSamplesPerCycle')); % samples per FPGA cycle
|
||||
Reference in New Issue
Block a user