2.5 KiB
2.5 KiB
📡 PL Rx Subsystem (Channelizer)
Overview
The Rx subsystem implements a polyphase filter bank (PFB) channelizer followed by FFT processing, a bypass path, and a multi-frame capture pipeline.
It converts wideband ADC input into frequency-domain channels (or raw samples via bypass) and streams the result to the PS.
Architecture
Channelizer Path (default)
ADC
↓
PFB Channelizer (Decimation + Filtering)
↓
FFT (512 bins)
↓
Capture (frame control)
↓
AXI4-Stream (128-bit, 4 samples/clock)
↓
DMA
Bypass Path (Debug / Raw Data)
ADC
↓
Bypass Path
↓
Capture (frame control)
↓
AXI4-Stream (128-bit, 4 samples/clock)
↓
DMA
Capture Pipeline
- Multi-frame acquisition (configurable nFrames)
- Frame size: 512 samples
- Supports asynchronous capture start (not frame-aligned)
- TLAST asserted at frame boundaries
Behavior
- First frame may be partial
- Frames may contain ≤ 2 frame indices (expected)
- DPW spans nFrames frames but covers nFrames + 1 frame regions
Processing Chain (Channelizer Mode)
ADC Input
- Sampling rate: 4096 MSPS
- Data type: fixdt(1,16,15) (Q1.15)
PFB Channelizer
- Decimation: 8
- Effective bandwidth: 512 MHz
FFT
- Size: 512
- Produces frequency bins
Capture
- Defines frame boundaries (512 samples)
- Generates TLAST
Numeric Format and Scaling
System Standardization
- End-to-end Q1.15 (fixdt(1,16,15))
Channelizer Output Scaling
- Native: sFix25_En23
- Quantized to: fixdt(1,16,15) (round + saturate)
Data Packing (Updated)
- 4 samples per clock
- Each sample: complex (16-bit real + 16-bit imag)
- Packed into 128-bit AXI4-Stream word
Benefits:
- Matches datapath parallelism
- Efficient DMA transfers
- Eliminates need for serializer stage
AXI4-Stream Output
- Width: 128 bits
- Contains 4 complex samples per cycle
- TLAST = frame boundary
Debug / Validation Features
A counter-based debug mode is implemented:
- Real part → sample counter (0..511)
- Imag part → frame index
Used to validate:
- Sample continuity
- Frame boundaries
- DMA ordering and integrity
Key Characteristics
- Fully streaming pipeline
- Deterministic latency
- High throughput (4 samples/clock)
- Dual-mode operation (channelizer / bypass)
- Validated up to nFrames = 1024