1.8 KiB
📡 PL Tx Subsystem (Pulse Generator)
Overview
The Tx subsystem implements a pulse-based Linear Frequency Modulated (LFM) chirp generator using a DDS/NCO architecture in the FPGA (PL).
The generator produces complex baseband output:
x[n] = exp(j·φ[n])
and operates deterministically in the PL after a trigger from the PS.
Architecture
TxPulseStart (PS) ↓ pulse_gen_ctrl (FSM) ↓ tx_active ↓ Phase Increment Counter ↓ NCO (DDS) ↓ Complex Output (I/Q)
Chirp Generation Principle
The chirp is generated using a second-order phase accumulator:
Δφ[n] = Δφ[n−1] + step
φ[n] = φ[n−1] + Δφ[n]
This results in a linear frequency sweep.
Parameterization (PS → PL)
Inputs:
- Center frequency: Fc
- Bandwidth: B
- Pulse width: N (samples)
Derived internally:
f_start = Fc − B/2
step = B / (N − 1)
These values are converted to DDS phase increments before being written to PL registers.
Pulse Timing (FSM)
States:
- IDLE: waits for trigger and latches parameters
- ACTIVE: generates pulses
- DONE: waits for trigger reset
Timing Behavior
Within each PRI:
|<------ PRI ------>| |<-- pulse -->| idle |
- tx_active = 1 → chirp output
- tx_active = 0 → output zero
Chirp is reset at each pulse start.
Burst Trigger (PS Interaction)
- Controlled via TxPulseStart (memory-mapped register)
- Rising edge triggers burst
- PL runs autonomously afterward
Key Characteristics
- Deterministic timing (128 MHz)
- Efficient DDS (adder-based)
- Complex output (I/Q)
- Supports burst-mode radar operation