Zcu111ResmReceiver/docs/pl_rx_subsystem.md

📡 PL Rx Subsystem (Channelizer)

Overview

Implements PFB channelizer and FFT processing.

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Architecture

ADC → PFB → FFT → Capture → FIFO → AXI → DMA

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Processing

• 4096 MSPS input
• Decimation 8
• FFT 512 bins

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Output

• AXI4-Stream
• uint64 format
• TLAST per frame

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🔗 Related Components

• Project Overview (README)
• PL Tx Subsystem
• PS Subsystem