145 lines
2.5 KiB
Markdown
145 lines
2.5 KiB
Markdown
# 📡 PL Rx Subsystem (Channelizer)
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[🏠 Project Home](../README.md)
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---
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## Overview
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The Rx subsystem implements a **polyphase filter bank (PFB) channelizer** followed by FFT processing, a **bypass path**, and a **multi-frame capture pipeline**.
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It converts wideband ADC input into frequency-domain channels (or raw samples via bypass) and streams the result to the PS.
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---
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## Architecture
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### Channelizer Path (default)
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ADC
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↓
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PFB Channelizer (Decimation + Filtering)
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↓
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FFT (512 bins)
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↓
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Capture (frame control)
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↓
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AXI4-Stream (128-bit, 4 samples/clock)
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↓
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DMA
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---
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### Bypass Path (Debug / Raw Data)
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ADC
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↓
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Bypass Path
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↓
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Capture (frame control)
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↓
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AXI4-Stream (128-bit, 4 samples/clock)
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↓
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DMA
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---
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## Capture Pipeline
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- Multi-frame acquisition (configurable nFrames)
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- Frame size: 512 samples
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- Supports asynchronous capture start (not frame-aligned)
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- TLAST asserted at frame boundaries
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### Behavior
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- First frame may be partial
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- Frames may contain ≤ 2 frame indices (expected)
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- DPW spans nFrames frames but covers nFrames + 1 frame regions
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---
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## Processing Chain (Channelizer Mode)
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### ADC Input
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- Sampling rate: 4096 MSPS
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- Data type: **fixdt(1,16,15)** (Q1.15)
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### PFB Channelizer
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- Decimation: 8
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- Effective bandwidth: 512 MHz
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### FFT
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- Size: 512
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- Produces frequency bins
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### Capture
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- Defines frame boundaries (512 samples)
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- Generates TLAST
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---
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## Numeric Format and Scaling
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### System Standardization
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- End-to-end Q1.15 (**fixdt(1,16,15)**)
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### Channelizer Output Scaling
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- Native: **sFix25_En23**
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- Quantized to: **fixdt(1,16,15)** (round + saturate)
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---
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## Data Packing (Updated)
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- 4 samples per clock
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- Each sample: complex (16-bit real + 16-bit imag)
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- Packed into **128-bit AXI4-Stream word**
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Benefits:
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- Matches datapath parallelism
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- Efficient DMA transfers
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- Eliminates need for serializer stage
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---
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## AXI4-Stream Output
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- Width: 128 bits
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- Contains 4 complex samples per cycle
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- TLAST = frame boundary
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---
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## Debug / Validation Features
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A counter-based debug mode is implemented:
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- Real part → sample counter (0..511)
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- Imag part → frame index
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Used to validate:
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- Sample continuity
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- Frame boundaries
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- DMA ordering and integrity
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---
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## Key Characteristics
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- Fully streaming pipeline
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- Deterministic latency
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- High throughput (4 samples/clock)
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- Dual-mode operation (channelizer / bypass)
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- Validated up to nFrames = 1024
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---
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## 🔗 Related Components
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- [🏠 Project Home](../README.md)
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- [PL Tx Subsystem](pl_tx_subsystem.md)
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- [PS Subsystem](ps_subsystem.md)
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