Changed NCO on AD/DA to 0Hz. Changed language for HDL IP to Verilog. Cleaned up for new soc_prj generation
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<?xml version="1.0" encoding="UTF-8"?>
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<Info File="soc_rfsoc_top.slx" GroupUUID="default" Icon="" Name="Open Top model" Type="Basic" Visible="1"/>
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="99406a55-7616-4757-b006-0caf9c3b006d" type="EntryPoint"/>
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<?xml version='1.0' encoding='UTF-8'?>
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<Info File="soc_rfsoc_top.slx" Icon="" Name="Open Top model" Type="Basic" Visible="1"/>
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<?xml version='1.0' encoding='UTF-8'?>
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<Info location="992f77a5-d756-4925-af3d-4c4ad157be49" type="EntryPoint"/>
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<?xml version='1.0' encoding='UTF-8'?>
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<?xml version="1.0" encoding="UTF-8"?>
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<Info>
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<Category UUID="FileClassCategory">
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<Label UUID="design"/>
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<?xml version='1.0' encoding='UTF-8'?>
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location="soc_rfsoc_top.slx" type="File"/>
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<?xml version='1.0' encoding='UTF-8'?>
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<Info>
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<Category UUID="FileClassCategory">
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<Label UUID="design"/>
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</Category>
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</Info>
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<?xml version="1.0" encoding="UTF-8"?>
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<Info location=".slx" type="File"/>
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