canisio

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-04 16:05:23 -03:00

3c6ae0cfe9 finished organization of init funcions and parameters

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-04 15:19:32 -03:00

eb14676581 Oganize preload and init functions and parameters (ongoing)

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-03 20:47:19 -03:00

040834d511 added docs folder to project path.

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-02 17:39:04 -03:00

a92709b500 Added bypass of channelizer to the documentation

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-02 17:36:27 -03:00

27ec12161c detailed subsystems

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-02 17:32:08 -03:00

5caaa7fd9a updated README

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-02 17:29:29 -03:00

ea0ecefae1 Added documentation and updated README

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-02 17:08:47 -03:00

e810145620 Pulse Generator TB validated

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-02 16:43:07 -03:00

a82aed0d5a Changed NCO to complex on TBm_chirp

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-02 16:28:46 -03:00

62ab58b741 Changed Update parameter subsystem on chirp TB to pulse fc and pulse BW.

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-02 12:04:19 -03:00

8e397fa41e Added draft to TBm_chirp model. Added init function script to testbench

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-01 12:06:00 -03:00

790c2fdb37 added placeholder for chirp block

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-04-01 11:52:04 -03:00

872fbfcd6e Minor changes

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-03-31 18:47:17 -03:00

9794b2d540 tested on HW. Bypass ok.

b72a8cd616 added time scope to interface

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canisio pushed to main at canisio/Zcu111ResmReceiver

2026-03-31 17:58:01 -03:00

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-03-31 17:51:30 -03:00

f66c3ffd06 Changed interface model to reflect bypass

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-03-31 17:25:04 -03:00

0c6938bff2 commented initialize register on proc model

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-03-31 16:41:36 -03:00

66ad6149e6 Added switch and led (physical)

a9b4ad9e17 Added bypass toggle via memory mapped register

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canisio pushed to main at canisio/Zcu111ResmReceiver

2026-03-31 15:55:50 -03:00

0ea6881d1e Added bypass to Rx on FPGA. Test OK

canisio pushed to main at canisio/Zcu111ResmReceiver

2026-03-31 14:26:49 -03:00

278e318715 Added simulink model to testbench bypass funcion (bypass folder)